Regarding the difference between DRAM and SRAM, Xiaobian knows that general DRAM is used as more memory, and SRAM is used as a cache. Now Xiaobian wants to share with you some of the knowledge I have learned recently. It is for your reference only. If you have any mistakes, everyone will correct me.
From the name, the difference between SRAM and DRAM is that one is static and the other is dynamic. Since the SRAM can save data without refreshing the circuit, it has the function of statically accessing data. DRAM needs to constantly refresh the circuit, otherwise the internal data will disappear. And the power consumption of the non-stop refresh circuit is very high, and a large part of the power consumed in our PC standby comes from the refresh of the memory. So why don't we use SRAM as memory?
SRAM storage requires six transistors, while DRAM only requires one capacitor and one transistor. Cache pursues speed, so choose SRAM, and memory pursues capacity, so choose DRAM that can store more content in the same space and is relatively inexpensive. Let's not talk about how SRAM statically stores data (triggers). So why does DRAM need to be constantly refreshed?
The DRAM data is actually in the presence of a capacitor. When the capacitor is put on for a long time, the internal charge will become less and less, and the external potential will not be formed. Moreover, when reading the DRAM, it is necessary to form a loop between the capacitor and the outside, and judge whether the bit is 1 or 0 by checking whether or not a charge flows in or out. So no matter what, we have destroyed the original data in the reading operation. So the data needs to be written back to the DRAM after the end of the read operation. During the entire read or write cycle, the computer will perform a DRAM refresh, typically a refresh cycle of 4ms-64ms.
The addressing methods for SRAM and DRAM are also different. Although we usually think of memory as a long array in a one-dimensional array, in reality the memory is arranged in a two-dimensional array, each unit has its row address and column address, of course, the cache is the same. The difference between the two is that for smaller SRAMs, we can pass the row and column addresses to SRAM in one go, and if we do this for DRAM, we need a lot of root address lines. Large, the longer the address, the more address bits). So we choose to transfer the row and column addresses separately to the DRAM. First select an entire row, then store the entire row of data in a latch, wait for the column address to be transmitted and then select the required data. This is one of the reasons why SRAM is faster than DRAM.